Clock Divider

Frequency halving using D flip-flops

Brief Summary
A square wave is given to the clock input of the 74LS74 flipflop. The Q-bar output is connected to the D input. Clear and Preset inputs should be held HIGH. Every rising edge toggles the output, but the falling edge is uneventful.
May 03, 2019
Jithin B.P.

Quick Start

A square wave is given to the clock input of the 74LS74 flipflop. The Q-bar output is connected to the D input. Clear and Preset inputs should be held HIGH. Every rising edge toggles the output, but nothing happens at the falling edge.

Photograph: D flip flop clock divider

Screenshot

Clock Divider

Duty Cycle

The duty cycle of the output waveform will be 50% irrespective of the duty cycle of the input waveform, as shown below.

Clock Divider